Industry expert Bob Willis uses the NPL Defect Database to explain how PCB delamination occurs, the impact it has on PCBs and ways to detect where the delamination has occurred.
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Recent Posts
- Electronics Assembly Standards IPC J-STD-001 and IPC-A-610 Updated to ‘F’ Revisions
- PCB Delamination and How it Occurs
- Solder Stencil Inspection
- SMT Adhesive Inspection
- HiPHoP Explained
- PCB Bowing and Twisting
- Wire corrosion
- Cracking on Single-sided Printed Boards
- Package on Package Popcorning
- Plated-Through Hole Damage
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